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NEORV32 Software Framework Documentation
The NEORV32 RISC-V Processor
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Demo program for emulating unaligned memory accesses using the NEORV32 run-time environment (RTE). More...
#include <neorv32.h>Macros | |
User configuration | |
| #define | BAUD_RATE 19200 |
| #define | DEBUG_INFO 0 |
Global variables | |
| volatile uint32_t | data_block [2] |
| void | trap_handler_emulate_unaligned_lw (void) |
| int | main () |
Demo program for emulating unaligned memory accesses using the NEORV32 run-time environment (RTE).
| #define BAUD_RATE 19200 |
UART BAUD rate
| #define DEBUG_INFO 0 |
Show debug info when 1
| int main | ( | void | ) |
Demo program to showcase RTE-based emulation of unaligned memory accesses.
| void trap_handler_emulate_unaligned_lw | ( | void | ) |
Emulate unaligned load-word operation
| volatile uint32_t data_block[2] |
Emulate unaligned load-word operation